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UVEPROM
Austin Semiconductor, Inc. 1 MEG UVEPROM
UV Erasable Programmable Read-Only Memory
AVAILABLE AS MILITARY SPECIFICATIONS
* SMD 5962-89614 * MIL-STD-883
SMJ27C010A
PIN ASSIGNMENT (Top View)
32-Pin DIP (J) (600 MIL)
V PP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc PGM\ NC A14 A13 A8 A9 A11 G\ A10 E\ DQ7 DQ6 DQ5 DQ4 DQ3
FEATURES
* Organized 131,072 x 8 * Single +5V 10% power supply * Operationally compatible with existing megabit EPROMs * Industry standard 32-pin ceramic dual-in-line package * All inputs/outputs fully TTL compatible * 8-bit output for use in microprocessor-based systems * Very high-speed SNAP! Pulse Programming * Power-saving CMOS technology * 3-state output buffers * 400mV minimum DC noise immunity with standard TTL loads * Latchup immunity of 250 mA on all input and output pins * No pullup resistors required * Low power dissipation (Vcc = 5.5V) PActive - 165 mW Worst Case PStandby - 0.55 mW Worst Case (CMOS-input levels)
Pin Name A0 - A18 DA0-DQ7 E\ G\ GND PGM\ VCC
Function Address Inputs Inputs (programming)/Outputs Chip Enable Output Enable Ground Program 5V Supply
VPP 13V Power Supply* *Only in program mode.
GENERAL DESCRIPTION
The SMJ27C010A series are 131072 by 8-bit (1048576bit), ultaviolet (UV) light erasable, electrically programmable read-only memories (EPROMs). These devices are fabricated using power-saving CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs) can be driven by Series 54 TTL circuits without the use of external pullup resistors. Each output can drive one Series 54 TTL circuit without external resistors. The SMJ27C010A EPROM is offered in a ceramic dual-in-line package (J suffix) designed for insertion in mounting-hole rows on 15.2mm (600mil) centers. These EPROMs operate from a single 5V supply (in the read mode), and therefore, are ideal for use in microprocessor-based systems. One other 13V supply is needed for programming. All programming signals are TTL level. These devices are programmable using the SNAP! Pulse programming algorithm. The SNAP! Pulse programming algorithm uses a VPP of 13V and a VCC of 6.5V for a nominal programming time of thirteen seconds. For programming outside the system, existing EPROM programmers can be used. Locations can be programmed singly, in blocks, or at random.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
OPTIONS
* Timing 120ns access 150ns access 200ns access * Package(s) Ceramic DIP (600mils)
MARKING
-12 -15 -20
J
No. 114
* Operating Temperature Ranges Military (-55oC to +125oC) M
For more products and information please visit our web site at www.austinsemiconductor.com
SMJ27C010A Rev. 1.0 9/01
1
UVEPROM
Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM*
EPROM 131,072 x 8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 E\ G\ 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 22 24 0
SMJ27C010A
A
0 131,071
A A A A A A A A
13 14 15 17 18 19 20 21
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
16 [PWR DWN] & EN
* This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. J package illustrated.
OPERATION
The seven modes of operation are listed in Table 1. The read mode requires a single 5V supply. All inputs are TTL level except for VPP during programming (13V for SNAP! Pulse), and 12V on A9 for signature mode.
TABLE 1. OPERATION MODES
FUNCTION E\ G\ PGM\ VPP VCC A9 A0 DQ0-DQ7 READ VIL VIL X VCC VCC X X Data Out MODE* OUTPUT PROGRAM SIGNATURE MODE STANDBY PROGRAMMING VERIFY DISABLE INHIBIT VIL VIL VIH VIL VIL VIH VIH X VCC VCC X X High-Z X X VCC VCC X X High-Z VIH VIL VPP VCC X X Data In VIL VIH VPP VCC X X Data Out X X VPP VCC X X High-Z VH** VIL VIL X VCC VCC VH** VIH
CODE MFG DEVICE 97 D6
* X can be VIL or VIH. **VH = 12V 0.5V
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
UVEPROM
Austin Semiconductor, Inc.
READ/OUTPUT DISABLE
When the outputs of two or more SMJ27C010As are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from competing outputs of the other devices. To read the output of a single device, a low level signal is applied to the E\ and G\ pins. All other devices in the circuit should have their outputs disabled by applying a high-level signal to one of these pins.
SMJ27C010A
SNAP! PULSE PROGRAMMING
The SMJ27C010A is programmed by using the SNAP! Pulse programming algorithm as illustrated by the flow chart (Figure 1). This algorithm programs in a nominal time of thirteen seconds. Actual programming time varies as a function of the programmer used. The SNAP! Pulse programming algorithm uses an initial pulse of 100 microseconds (s) followed by a byte verification to determine when the addressed byte has been successfully programmed. Up to ten 100s pulses per byte are provided before a failure is recognized. The programming mode is achieved when V PP = 13V, VCC= 6.5V, E\ = VIL, and G\ = VIH. Data is presented in parallel (eight bits) on pins DQ0 through DQ7. Once addresses and data are stable, PGM\ is pulsed low. More than one device can be programmed when the devices are connected in parallel. Locations can be programmed in any order. When the SNAP! Pulse programming routine is complete, all bits are verified with VCC = VPP = 5V 10%.
LATCHUP IMMUNITY
Latchup immunity on the SMJ27C010A is a minimum of 250mA on all inputs and outputs. This feature provides latchup immunity beyond any potential transients at the printed circuit board level when the devices are interfaced to industry-standard TTL or MOS logic devices. The input/ output layout approach controls latchup without compromising performance or packing density.
POWER DOWN
Active ICC supply current can be reduced from 30mA to 500A by applying a high TTL input on E\ and to 100A by applying a high CMOS input on E\. In this mode all outputs are in the high-impedance state.
PROGRAM INHIBIT
Programming can be inhibited by maintaining high level inputs on the E\ or the PGM\ pins.
ERASURE
Before programming, the SMJ27C010A EPROM is erased by exposing the chip through the transparent lid to a highintensity ultraviolet light (wavelength 2537 A). The recommended minimum exposure dose (UV intensity x exposure time) is 15-W .s/cm 2. A typical 12-mW/cm 2, filterless UV lamp erases the device in 21 minutes. The lamp should be located about 2.5cm above the chip during erasure. After erasure, all bits are in the high state. It should be noted that normal ambient light contains the correct wavelength for erasure; therefore, when using the SMJ27C010A, the window should be covered with an opaque label. After erasure (all bits in logic high state), logic lows are programmed into the desired locations. A programmed low can be erased only by ultraviolet light.
PROGRAM VERIFY
Programmed bits can be verified with VPP = 13V when G\ = VIL, and E\ = VIL, and PGM\ = VIH.
SIGNATURE MODE
The signature mode provides access to a binary code identifying the manufacturer and type. This mode is activated when A9 (pin 26) is forced to 12V. Two identifier bytes are accessed by toggling A0. All other addresses must be held low. The signature code for these devices is 97D6. A0 low selects the manufacturer's code 97 (Hex), and A0 high selects the device code D6 (Hex), as shown in Table 2.
TABLE 2. SIGNATURE MODES
IDENTIFIER* MANUFACTURER CODE DEVICE CODE A0 VIL VIH DQ7 1 1 DQ6 0 1 DQ5 0 0 PINS DQ4 DQ3 1 0 1 0 DQ2 1 1 DQ1 1 1 DQ0 1 0 HEX 97 D6
* E\ = G\ = VIL, A1 - A8 = VIL, A9 = VH, A10 - A16 = VIL, VPP = VCC.
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
UVEPROM
Austin Semiconductor, Inc.
SMJ27C010A
FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART
START Address = First Location VCC = 6.5V 0.25V, VPP = 13V 0.25V Program One Pulse = tW = 100s Increment Address Program Mode
Last Address?
No
Yes Address = First Location X=0 Program One Pulse = tW = 100s No Verify One Byte Pass Last Address?
Increment Address
Fail
X = X+1
X = 10?
Interactive Mode
No
Yes VCC = VPP = 5V 0.5V
Yes Device Failed
Compare All Bytes to Original Data
Fail
Final Verification
Pass Device Passed
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
UVEPROM
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS* Supply Voltage Range, VCC**...........................-0.6V to +7.0V Supply Voltage Range, Vpp**.........................-0.6V to +14.0V Input Voltage Range, All inputs except A9**..-0.6V to VCC+1 A9.....-0.6V to +13.5V Output Voltage Range, with respect to VSS**..................................-0.6V to VCC +1 Operating Free-air Temperature Range, TA....-55C to 125C Storage Temperature Range, Tstg.....................-65C to 150C
SMJ27C010A
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** All voltage values are with respect to GND.
RECOMMENDED OPERATING CONDITIONS
VCC VPP VIH VIL TA Supply Voltage Supply Voltage Read Mode SNAP! Pulse programming algorithm Read Mode SNAP! Pulse programming algorithm TTL CMOS TTL CMOS
2 1
MIN 4.5 6.25 VCC-0.6 12.75 2 VCC-0.2 -0.5 -0.5 -55
NOM 5 6.5 VCC 13
MAX 5.5 6.75 VCC+0.6 13.25 VCC+0.5 VCC+0.5 0.8 GND+0.2 125
UNIT V V V V V V V V C
High-level DC input voltage Low-level DC input voltage Operating free-air temperature
NOTES: 1. VCC must be applied before or at the same time as VPP and removed after or at the same time as VPP. The deivce must not be inserted into or removed from the board when VPP or VCC is applied. 2. During programming, VPP must be maintained at 13V 0.25V.
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE
PARAMETER VOH VOL II IO IPP1 IPP2 ICC1 High-level DC output voltage TEST CONDITIONS IOH = -20A IOH = -2.5mA Low-level DC output voltage Input current (leakage) Output current (leakage) VPP supply current VPP supply current (during program pulse) VCC supply current (standby) TTL-Input Level IOL = 2.1mA IOL = 20A VI = 0V to 5.5V VO = 0V to VCC VPP = VCC = 5.5V VPP = 13V VCC = 5.5V, E\=VIH E\=VIL, VCC=5.5V ICC2 VCC supply current (active) (output open) tcycle = minimum cycle time, outputs open
NOTES: 1. Minimum cycle time = maximum access time.
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MIN VCC-0.2 3.5
MAX
UNIT V
0.4 0.1 1 1 10 50 500 100
V A A A mA A
CMOS-Input Level VCC = 5.5V, E\=VCC0.2V
30
mA
1
5
UVEPROM
Austin Semiconductor, Inc.
PARAMETER CI CO Input capacitance Output capacitance TEST CONDITIONS VI = 0V, f = 1MHz VO = 0V, f= 1 MHz TYP** 4 6 MAX 8 10 UNIT pF pF
SMJ27C010A
CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, f = 1MHz*
* Capacitance measurements are made on sample basis only. ** All typical values are at TA = 25C and nominal voltages.
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF OPERATING CONDITIONS 1,2
PARAMETER ta(A) ta(E) ten(G) tdis tv(A) Access time from address Access time from chip enable Output enable time from G\ Output disable time from G\ or E\, whichever occurs first Output data valid time after change of address, E\, or G\, whichever occurs first
3 3
TEST CONDITIONS
-12 120
-15 150 150 75 0 0 60 0 0
-20 200 200 75 60
MIN MAX MIN MAX MIN MAX 120 55 0 0 50
UNIT ns ns ns ns ns
CL = 100pF 1 Series 74 TTL Load, Input tr < 20ns, Input tf < 20ns
NOTES: 1. For all switching characteristics, the input pulse levels are 0.4V to 2.4V. Timing measurements are made at 2V for logic high and 0.8V for logic low. (Reference AC testing waveform) 2. Common test conditions apply for tdis except during programming. 3. Value calculated from 0.5V delta to measured output level.
SWITCHING CHARACTERISTICS FOR PROGRAMMING: V CC = 6.5V and VPP = 13V (SNAP! Pulse), T A = 25C 1
tdis(G) PARAMETER Disable, Output disable time from G\ MIN 0 MAX 130 UNIT ns
150 ns ten(G) Enable, Output enable time from G\ NOTE: 1. For all switching characteristics, the input pulse levels are 0.4V to 2.4V. Timing measurements are made at 2V for logic high and 0.8V for logic low (reference AC testing waveform).
TIMING REQUIREMENTS FOR PROGRAMMING
MIN tw(PGM) tsu(A) tsu(E) tsu(G) tsu(D) tsu(Vpp) tsu(Vcc) th(A) th(D)
SMJ27C010A Rev. 1.0 9/01
TYP 100
MAX 105
UNIT s s s s s s s s s
Pulse duration, program Setup Time, Address Setup Time, E\ Setup Time, G\ Setup Time, Data Setup Time, VPP Setup Time, VCC Hold time, address Hold time, data
SNAP! Pulse Programming Algorithm
95 2 2 2 2 2 2 0 2
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
UVEPROM
Austin Semiconductor, Inc.
PARAMETER MEASUREMENT INFORMATION
2.08V RL = 800 Output Under Test CL = 100 pF1
NOTES: 1. CL includes probe and fixture capacitance.
SMJ27C010A
FIGURE 2. AC TEST OUTPUT LOAD CIRCUIT WAVEFORM
AC testing inputs are driven at 2.4V for logic high and 0.4V for logic low. Timing measurements are made at 2V for logic high and 0.8V for logic low for both inputs and outputs. FIGURE 3. READ-CYCLE TIMING
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
UVEPROM
Austin Semiconductor, Inc.
SMJ27C010A
FIGURE 4. PROGRAM-CYCLE TIMING (SNAP! PULSE PROGRAMMING)
* tdis(G) and ten(G) are characteristics of the device but must be accommodated by the programmer. ** 13V VPP and 6.5V VCC for SNAP! Pulse programming.
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
UVEPROM
Austin Semiconductor, Inc. MECHANICAL DEFINITION*
ASI Case #114 (Package Designator J) SMD 5962-89614, Case Outline X
SMJ27C010A
D A
L L1
b e Pin 1 b1
E
b2 E1
SMD Specifications SYMBOL A b b1 b2 D E e E1 L1 L MIN --0.014 0.045 0.008 --0.510 0.100 BSC 0.600 BSC 0.125 0.015 0.200 0.070 MAX 0.225 0.026 0.065 0.018 1.680 0.620
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
*All measurements are in inches.
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
UVEPROM
Austin Semiconductor, Inc.
SMJ27C010A
ORDERING INFORMATION
EXAMPLE: SMJ27C010A-12JM
Device Number Speed ns SMJ27C010A SMJ27C010A SMJ27C010A -12 -15 -20 Package Process Type J J J * * *
*AVAILABLE PROCESSES M = Extended Temperature Range
-55oC to +125oC
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
UVEPROM
Austin Semiconductor, Inc.
SMJ27C010A
ASI TO DSCC PART NUMBER CROSS REFERENCE*
ASI Package Designator J
TI Part #** SMJ27C010A-12JM SMJ27C010A-15JM SMJ27C010A-20JM SMD Part # 5962-8961406QXA 5962-8961405QXA 5962-8961403QXA
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. ** Parts are listed on SMD under the old Texas Instruments part number. ASI purchased this product line in November of 1999.
SMJ27C010A Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11

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